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Freescale Semiconductor /MK21D5WS /PTA /PTOR

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Interpret as PTOR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (0)PTTO

PTTO=0

Description

Port Toggle Output Register

Fields

PTTO

Port Toggle Output

0 (0): Corresponding bit in PDORn does not change.

1 (1): Corresponding bit in PDORn is set to the inverse of its existing logic state.

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data